Accelerating streaming applications with reconfigurable accelerators: two examples from the bioinformatics and data summarization domains
| Dates: | 23 October 2019 |
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| Times: | 14:00 - 15:00 |
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| What is it: | Seminar |
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| Organiser: | Department of Computer Science |
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| Who is it for: | University staff, Adults |
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| Speaker: | Professor Dionisios Pnevmatikatos |
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Join us for the next Computer Science Atlas talk with speaker Dionisios Pnevmatikatos, School of ECE, Technical University of Crete
At the Microprocessor a Hardware Laboratory of the Technical University of Crete we have a long track of research in reconfigurable accelerators. I will give an overview of our recent work on reconfigurable accelerators for streaming applications using two examples.
The first is on genomic dataset processing to detect places in the genome where positive selection has occurred - a process with significant value in the design of more effective drug treatments, etc. Existing (software) methods for positive selection detection either are not designed to handle whole genomes or scale poorly with the sample size invariably resorting in a trade-off between run-time and accuracy. Our proposed RAiSD-X is a high-performance system that relies on a decoupled access-execute processing paradigm for efficient FPGA acceleration to achieve up to three orders of magnitude faster processing compared to previous widely-used software implementations. The second is the summarization of streaming data over large sliding windows. We focus on the Exponential Count-Min (ECM) sketch algorithm that creates approximate sketch synopses of input streams with probabilistic accuracy guarantees while it is space and time efficient (and cache-memory friendly). We craft several reconfigurable ECM sketch acceleration architectures with different cost and performance trade-offs. The proposed architectures achieve guaranteed and best-effort update rates up to 150 and 180 million tuples per second respectively. Compared against the best optimized multi-thread software implementation our scalable full-system accelerators outperform (parallel) software by 5-7.5x for Virtex6 devices and in excess of 10x for current Ultrascale devices.
Bio: Dr. Dionisios N. Pnevmatikatos (male) is a Professor and Director of the Microprocessor and Hardware Laboratory (MHL) at the School of Electrical and Computer Engineering, Technical University of Crete (TUC), and a research associate with FORTH-ICS since 1997. He received his PhD in Computer Science in 1995 from the University of Wisconsin?Madison. He has participated as a coordinator in FASTER FP7 EU project, and as Principal Investigator in the DeSyRe FP7 and the AXIOM, dRedBox, and EXTRA H2020 projects, as well as for several national projects. His research interests include Computer Architecture, with a focus on using reconfigurable computing to create high-performance, efficient, accelerated, heterogeneous parallel/rack-scale systems. He has also worked on Reliable System Design, Networking Hardware and Network Processors, Application Acceleration, Custom and Application-Specific Architectures, and Hardware Acceleration of Bioinformatics Algorithms. He has been in the Program Committee of conferences such as ISCA, FPL and DATE in Computer Architecture and Reconfigurable System topics, and has been a Program (co)chair for SAMOS 2018 and FPL 2011.
Speaker
Professor Dionisios Pnevmatikatos
Role: Professor and Director of MHL at Technical University of Crete
Organisation: TUC
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Lecture Theatre 1.5
Kilburn Building
Manchester
